Category: JEDEC

DEFINITION OF the SSTUB32865 28-bit 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007

QUALITY AND RELIABILITY STANDARDS AND PUBLICATIONS
standard by JEDEC Solid State Technology Association, 10/01/1999

DESCRIPTIVE DESIGNATION SYSTEM FOR SEMICONDUCTOR-DEVICE PACKAGES
standard by JEDEC Solid State Technology Association, 08/01/2008

Embedded Multi-media card (e*MMC), Electrical Standard 5.0
standard by JEDEC Solid State Technology Association, 09/01/2013

DELPHI COMPACT THERMAL MODEL GUIDELINE
standard by JEDEC Solid State Technology Association, 10/01/2008

STANDARD FOR DEFINITION OF CUA878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2005

RADIO FRONT END – BASEBAND DIGITAL PARALLEL (RBDP) INTERFACE
standard by JEDEC Solid State Technology Association, 03/01/2007

STANDARD MANUFACTURERS IDENTIFICATION CODE
standard by JEDEC Solid State Technology Association, 04/01/2009

Graphics Double Data Rate (GDDR5X) SGRAM Standard
standard by JEDEC Solid State Technology Association, 11/01/2015

DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONS
standard by JEDEC Solid State Technology Association, 12/01/2010