JEDEC JESD241
Procedure for Wafer-Level DC Characterization of Bias Temperature Instabilities
standard by JEDEC Solid State Technology Association, 12/01/2015
JEDEC JEP001-1A
FOUNDRY PROCESS QUALIFICATION GUIDELINES – BACKEND OF LINE (Wafer Fabrication Manufacturing Sites)
standard by JEDEC Solid State Technology Association, 09/01/2018
JEDEC JEP 155
RECOMMENDED ESD TARGET LEVELS FOR HBM/MM QUALIFICATION
standard by JEDEC Solid State Technology Association, 08/01/2008
JEDEC JESD22-A111B
EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES
standard by JEDEC Solid State Technology Association, 03/01/2018
JEDEC JESD 209-2B
LOW POWER DOUBLE DATA RATE 2 (LPDDR2)
standard by JEDEC Solid State Technology Association, 02/01/2010
JEDEC JESD18-A
STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGIC
standard by JEDEC Solid State Technology Association, 01/01/1993
JEDEC JEP174
UNDERSTANDING ELECTRICAL OVERSTRESS – EOS
standard by JEDEC Solid State Technology Association, 09/01/2016
JEDEC JEP122H
Failure Mechanisms and Models for Semiconductor Devices
standard by JEDEC Solid State Technology Association, 09/01/2016
JEDEC JESD250B
Graphics Double Data Rate (GDDR6) SGRAM Standard
standard by JEDEC Solid State Technology Association, 11/01/2018
JEDEC JESD211
ZENER AND VOLTAGE REGULATOR DIODE RATING VERIFICATION AND CHARACTERIZATION TESTING
standard by JEDEC Solid State Technology Association, 12/01/2009