Category: JEDEC

Addendum No. 1 to JESD79-4, 3D Stacked DRAM Standard
Amendment by JEDEC Solid State Technology Association, 02/01/2017

INTEGRATED CIRCUIT THERMAL MEASUREMENT METHOD – ELECTRICAL TEST METHOD (SINGLE SEMICONDUCTOR DEVICE)
standard by JEDEC Solid State Technology Association, 12/01/1995

ADDENDUM No. 9B to JESD8 – STUB SERIES TERMINATED LOGIC FOR 2.5 VOLTS (SSTL_2): Includes Errata and Corrected Page 7 as of October 18, 2002
standard by JEDEC Solid State Technology Association, 05/01/2002

WIRE BOND SHEAR TEST
standard by JEDEC Solid State Technology Association, 04/01/2017

SOLDER BALL PULL
standard by JEDEC Solid State Technology Association, 08/01/2010

APPLICATION SPECIFIC QUALIFICATION USING KNOWLEDGE BASED TEST METHODOLOGY
standard by JEDEC Solid State Technology Association, 07/01/2008

Serial Interface for Data Converters
standard by JEDEC Solid State Technology Association, 01/01/2012

GUIDELINES FOR PARTICLE IMPACT NOISE DETECTION (PIND) TESTING, OPERATOR TRAINING, AND CERTIFICATION
standard by JEDEC Solid State Technology Association, 10/01/2007

Low Power Double Data Rate 5 (LPDDR5)
standard by JEDEC Solid State Technology Association, 02/01/2019

TEST METHODS AND ACCEPTANCE PROCEDURES FOR THE EVALUATION OF POLYMERIC MATERIALS
standard by JEDEC Solid State Technology Association, 03/01/2018